A CMOS buffer may be used as an output buffer for data communication among semiconductor chips in terms of power saving. An output from the CMOS buffer transits between a low power supply potential and a high power supply potential at a full amplitude.
Further, in order to achieve power saving of the CMOS buffer, there is a method that a source of an N-channel MOS transistor constituting a CMOS inverter circuit is connected to a low potential side power supply via a P-channel MOS transistor to supply an intermediate level between the high potential side power supply and the low potential side power supply to a gate of the P-channel MOS transistor.
However, with the method, an amplitude of an output signal of the output buffer is reduced, which causes a reduction in drive capability. Thus, there is a problem that when a load capacity imposed on the output buffer increases, a deterioration in signal waveform such as falling before sufficient rising occurs.
Further, with the method, there is a problem that since a pad electrode needs to be provided for each output buffer and the pad electrode cannot be shared between an output buffer and an input buffer, the number of pad electrodes increases.